Aging-Dependent Electrical Properties in Polymer-Passivated ZnO Nanowire Field Effect Transistors

Aging-dependentelectricalpropertiesinpoly(methylmethacrylate)(PMMA)-passivatedZnOnanowireﬁeldeffecttransistors,whichshowanenhancement-modebehavior,wereinvestigated.Theelectricalcharacteristicsofthedevicesweresystematicallymeasured andcomparedbeforeandafterstorageinavacuumdesiccatorfor8months.Theelectricalpropertiesoftheageddevices,suchasmobility,subthresholdswing,andcarrierdensity,weregreatlyimprovedcomparedwiththoseoftheas-fabricateddevices.Thiscan beattributedtodesorptioneffectsofadsorbedmoleculesonthenanowiresurfaceinwhichtheadsorbedmoleculescantransportthroughaPMMApassivationlayerundervacuum.

In recent years, ZnO nanostructures have attracted much attention for potential applications, such as light-emitting diodes, transistors, photodetectors, sensors, solar cells, logic circuits, and energy harvesting devices, due to their unique physical properties of direct wide-bandgap energy (3.37 eV), large exciton binding energy (60 meV), piezoelectricity. 1-10 Among such device applications, nanowire field effect transistors (FETs) have been fabricated and extensively studied because they are the fundamental building blocks in nanoelectronics. [3][4][5]9 Importantly, ZnO nanowire-based devices are sensitively dependent on surface structures of nanowires and surface-adsorbed oxygen and/or water molecules due to their large surface area to volume ratios, resulting in the significant influence on the electrical properties of the nanowire devices, especially ZnO nanowire FETs. [3][4][5]11 Therefore, organic and inorganic passivation layers for the ZnO nanowire-based FETs have been employed to protect nanowire surfaces from undesirable chemisorption of ambient gases, primarily oxygen. [3][4][5]11 For example, Chang et al. reported that passivation of a SiO 2 /Si 3 N 4 bilayer improved the device performance of ZnO nanowire FETs. 12 Lee and co-workers also reported poly(methyl methacrylate) (PMMA)passivated ZnO nanowire FETs. 3,4 In particular, since polymer passivation layers have advantages of a simple and low-cost solution process, but can suffer from high permeability to gases, the electronic transport properties ZnO nanowire FETs can be significantly changed after exposure to environmental factors for a long period. Accordingly, it is necessary to study on the aging effects of polymer passivation on the electronic properties of the ZnO nanowires for the development of useful nanowire-based device applications.
In the present work, we report the aging effects based on the electrical characteristics of the PMMA-passivated ZnO nanowire FETs before and after storage in a vacuum desiccator under approximately 10 −2 torr for 8 months. All the measured devices were an enhancement-mode (normally-off type) FETs, which exhibits off current status at zero gate bias and positive threshold voltages. 3 Compared with the ZnO nanowire FETs before storage in a vacuum desiccator for 8 months, the threshold voltage (V th ) for the same nanowire FETs after storage for 8 months (refer to as the aged FETs) shifted toward the negative gate bias direction and exhibited the enhancement of device parameters such as mobility (μ FE ), subthreshold swing (SS), and carrier density (n e ). This can be attributed to desorption effects through the PMMA passivation layer of the oxygen and/or water molecules adsorbed on the surface of rough ZnO nanowire.

Experimental
All of ZnO nanowires used in this study were synthesized by a vapor transport method without using metal-catalysts as reported z E-mail: wkh27@kbsi.re.kr elsewhere. 3,4 In detail, to grow the high-density ZnO nanowires, a mixed source of ZnO powder (99.995%) and graphite powder (99%) in a ratio of 1:1 was blended with ethanol. The source materials and cplane sapphire substrates with a 1 μm-thick Al-doped ZnO film layer were placed in an alumina boat, which was then pushed into the center of the horizontal tube furnace. Here, Al-doped ZnO films were coated on the sapphire substrates by a radio frequency (rf) sputtering system using a commercially sintered ZnO target and an Al 2 O 3 (1 wt%)doped ZnO target. 3 The furnace was heated at a rate of 35 • C/min and held at approximately 930 • C for 30-40 min under a flow of Ar (50 sccm) and O 2 (0.2 sccm). During the whole growth process, the pressure of the furnace was kept at approximately 680 Torr. The morphological and structural characterizations were performed using field emission scanning electron microscopy (FESEM) and transmission electron microscopy (TEM). In order to investigate aging-dependent electrical properties of ZnO nanowire, the FET devices with a back gate configuration were fabricated. The ZnO nanowires that were grown on Al-doped ZnO film were transferred to a silicon wafer with 100 nm thick thermally grown oxide (SiO 2 ) by dropping and drying a liquid suspension of ZnO nanowires. The nanowire suspension was made by briefly sonicating the growth substrate of ZnO nanowires in isopropyl alcohol for approximately 60 s. Silicon wafers used in this study were a highly doped p-type substrate which can serve as a back gate electrode. For the fabricated ZnO nanowire FETs, source and drain metal electrodes consisting of Ti (100 nm)/Au (80 nm) were deposited by an electron beam evaporator after photolithography and lift-off processes. The distance between source and drain electrodes is approximately 3 μm, as shown in Fig. 1c. All of the fabricated devices were coated with a PMMA layer by spin coating at 4000 rpm, followed by soft-baking in an oven at 120 • C for 30 min. For the electrical measurements of the ZnO nanowire FETs, 10 devices were fabricated and characterized. The electrical properties of the nanowire FET devices with a PMMA passivation layer were characterized using a semiconductor characterization system (Keithley 4200-SCS) at room temperature under ambient air. For studying aging effects in the PMMA-passivated ZnO nanowire FET devices, the FET devices were stored under humidity of ∼27% and vacuum condition of approximately 10 −2 torr at room temperature. images of roughly approximately 160 different nanowires grown on a Al-doped ZnO film substrate. Note that FESEM images were not enough to resolve the roughness of corrugated nanowires. The inset in Fig. 1b shows a selective area electron diffraction(SAED) pattern, indicating that the nanowires are a single-crystalline structure with a growth direction of [0001]. In order to investigate aging-dependent electrical properties of the ZnO nanowires with rough surface, the FET device with a Si-back-gate was fabricated, as shown in a SEM top-view image (Fig. 1c) and a schematic illustration of the device (Fig. 1d).

Results and Discussion
The electrical characteristics of as-fabricated ZnO nanowire FETs with a PMMA passivation layer are summarized in Fig. 2. Fig. 2a and 2b shows the representative data of source-drain current versus voltage (I DS -V DS ) and source-drain current versus gate voltages (I DS -V G ) for the ZnO nanowire FET with a normally off-type behavior, indicating a n-channel enhancement-mode FET. In the I DS -V G curves (Fig. 2b), the V th is 10.6 V, which can be attributed to deep traps in the channel or at the interface. 13,14 Note that the V th is defined as the gate voltage obtained by extrapolating the linear portion of the transfer characteristics I DS -V G from the point of maximum slope to  zero drain current, in which the point of maximum slope is the point where transconductance (g m = dI DS /dV G ) is a maximum value. 13 The I DS -V DS curves (Fig. 2a) of the n-channel enhancement-mode FET have well-defined linear regimes at low biases and saturation regimes at high biases, indicating that the characteristics of Ohmic contacts between the ZnO nanowire and Ti/Au electrodes. 15 The I DS -V G plot in the semilogarithmic scale (inset of Fig. 2b) displays an on/off current ratio as large as 10 5 .
In order to investigate aging effects of the PMMA-passivated ZnO nanowire FETs, the nanowire FET devices before and after storage of the FET devices in a vacuum desiccator for 8 months (approximately 240 days) were systematically measured. Fig. 3a shows the representative transfer characteristics at V DS = 0.02 and 0.1 V for the FET devices before and after 8 months. Noticeably, the V th of the particular FET device shown in Fig. 3a shifted from 10.5 to 7.4 V. Fig. 3b shows the statistical results of the changes in the V th and the carrier density (n e ) from a total of 10 ZnO nanowire FET devices before and after 8 months. Note that the change in the electrical properties of ZnO nanowire FETs after 1 week storage was negligible in comparison with those of the as-fabricated FETs. Compared with the as-fabricated FET device, the V th for the aged FET devices exhibited a considerable shift toward the negative gate bias direction, leading to the increase in the carrier density. This implies the decrease of surface-depletion region in the nanowire channel due to the reduction of electron traps at ZnO nanowire/SiO 2 and/or ZnO nanowire/PMMA interfaces. Fig. 3c and 3d shows the plots of the representative transconductance (g m ) and the calculated field-effect mobility (μ FE ) as a function of gate voltage for the as-fabriated and aged nanowire FETs. The μ FE can be calculated by the following equations: 3,13 μ F E = d I DS dV G L 2 V DS C g [1] C g = 2πε r ε 0 L cosh −1 ( r +t r ) [2] where C g is the gate oxide capacitance, t is the thickness of gate oxide layer (100 nm), r is the nanowire radius, ε r is the dielectric constant of the gate oxide layer (ε r = 3.9 for SiO 2 ), ε 0 is the permittivity constant of vacuum, L is the channel length of a nanowire (3 μm), and V DS = 0.1 V. The μ FE , V th , SS, and n e in the nanowire FET devices before and after storage in a vacuum desiccator for 8 months are summarized in Table I. The aged FET devices of rough ZnO nanowires exhibited superior electrical performance than the as-fabricated FET devices. For the aged FETs, the average shift in threshold voltage ( V th ) was approximately 3.8 V and the average mobility was enhanced from 33.5 to 43.7 cm 2 /Vs. As an important device performance parameter of FET, SS, defined as SS = dV G /d log I DS , is desired to be small for low power operation. 16,17 In our case, the as-fabricated and aged ZnO nanowires FETs with a back-gate configuration exhibited the SS of approximately 0.54 and 0.44 V/dec, respectively. The n e for the as-fabricated and aged FETs was approximately 5.5 × 10 17 and 9.2 × 10 17 cm −3 at V G = 15 V, respectively. The n e was estimated from equations 2 and 3, The enhancement of electrical characteristics in the aged FET devices can be explained in terms of the reduction of electron traps in ZnO nanowires, as shown in Fig. 4. Fig. 4 shows the cross-sectional schematic illustrations (top figures in Fig. 4a and 4b) across the Siback-gate, dielectric layers, ZnO nanowire, PMMA passivation layer and with the corresponding equilibrium energy band diagram (bottom figures in Fig. 4a and 4b) of the ZnO nanowire FETs. Fig. 4a shows the case for the as-fabricated ZnO nanowire FETs with a PMMA passivation layer, and Fig. 4b shows the case for the aged nanowire FETs. As reported previously, a great number of oxygen molecules can be adsorbed on the surfaces of the rough ZnO nanowires with a lot of adsorbed sites on the nanowire surface. 3,18 In addition, oxygen containing water molecules (H 2 O) can be absorbed on the surface of rough ZnO nanowires during the fabrication of PMMA passivation layer in the ambient atmosphere. The adsorbed water molecules can serve as oxygen source, resulting in capturing electrons from the nanowire surface and formation of surface depletion regions. 13,[19][20][21] Since the average diameter of ZnO nanowires used in this study was found to be approximately 85 nm from SEM observations (Fig. 1a), the absorbed water molecules can act as electron trap centers on the thin ZnO nanowires with rough surface. For the ZnO nanowires with rough surface morphology, the surface depletion width can be comparable to the diameter size of the nanowire. 3,13 This indicates that the 85-nm-thick ZnO nanowires are thin, leading to complete depletion under the no-gate-bias condition. Therefore, the as-fabricated FET devices made from the rough ZnO nanowires can have a significant fraction of the surface depletion region in the nanowire channel due to electron traps such as oxygen and/or water molecules, resulting in surface band bending and depletion of electron carriers at the surface of nanowire channel, as shown in Fig. 4a. In contrast, for the aged FET devices after storage in a vacuum desiccator for 8 months exhibited the superior electrical characteristics, which could be attributed to desorption effects of the oxygen and/or water molecules adsorbed on the surface of rough ZnO nanowire because the oxygen and water molecules can transport through polymeric materias. 13,21 The diffusion coefficient of oxygen and/or water are 1.93 × 10 −8 and 3.35 × 10 −8 cm 2 /s, respectively. 22,23 As a result, the aged FET devices can have relatively smaller surface depletion region due to the decrease of electron trap centers on the surface of nanowire channel, leading to the V th shift toward the negative gate bias direction, the increase in carrier density, and the enhancement of a SS value.

Conclusions
In this work, aging-dependent electrical properties in polymerpassivated ZnO nanowire field effect transistors (FETs), which exhibit ) unless CC License in place (see abstract). ecsdl.org/site/terms_use address. Redistribution subject to ECS terms of use (see 207.241.231.80 Downloaded on 2018-07-21 to IP a normally off-type behavior, were investigated. The electrical characteristics of the FET devices were systematically measured and compared before and after storage in a vacuum desiccator for 8 months. The aged FET devices showed superior electrical characteristics than the as-fabricated FET devices. For the aged FET devices, the shift in threshold voltage toward the negative gate bias direction was approximately 3.8 V on average and the average mobility was enhanced from 33.5 to 43.7 cm 2 /Vs. The as-fabricated and aged FETs exhibited the SS of approximately 0.54 and 0.44 V/dec, respectively. The n e for the as-fabricated and aged FETs was approximately 5.5 × 10 17 and 9.2 × 10 17 cm −3 at V G = 15 V, respectively. This study will provide a useful insight into further understanding of passivation effects of a polymer layer on electronic properties of ZnO nanostructures and the design of ZnO nanostructure-based devices with high performance.